John Bonk

Synthesis of Array Architectures for Block Matching Motion Estimation: Design Exploration Using the Tool DG2VHDL

Friday, December 11, 1998
2:00 PM
406 Egan

Abstract

Implementing complex signal processing algorithms in digital hardware can be a difficult and time consuming task. The use of Hardware Descriptive Languages (HDLs) provides the designer with a level of abstraction from a gate or component level design, but still does not provide a high enough level of abstraction for describing complex signal processing algorithms. These algorithms are described graphically using what are called Directed Dependence Graphs (DGs). A software tool called DG2VHDL was created by Andrew Stone and Professor Elias Manolakos which focuses on providing a means to synthesize complex signal processing algorithms directly from the Dependence Graph of the algorithm. The description of the DG is input to the tool, and synthesizable VHDL code is output, along with the necessary script files needed for synthesis by Synopsys' Behavioral Compiler (BC). This report summarizes the exploration of Full Search Block Matching Algorithms using the Dependence Graph software tool DG2VHDL and Synopsys' BC. Advisor: Professor Elias S. Manolakos and Professor Mike Vai